🎓 NIMCET📅 Year: 2018📚 Computer🏷 Computer Organization and Architecture (COA)
5
Let the memory access time is 10 milliseconds and cache access time is 10 microseconds. Assume the cache hit ratio 15%. The effective memory access time is
In direct mapping, multiple memory blocks may map to the same cache line, causing frequent replacement (conflict misses), which degrades the hit ratio.
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